Matrix storage device

ABSTRACT

In order to reduce stray of the output voltage in reading information from a magnetic matrix store, the information is written as many times in the inverted state as in the noninverted state, on average, so that the heat dissipation on an average is the same for all cores. The inverted or noninverted state of the written information is recorded by an auxiliary core joined to each word, which core is read when the information of the word concerned is read.

United States Patent [72] Inventors Heinrich Eduard Van Bruck; [56]References Cited W floltwiik, Emmasingel, UNITED STATES PATENTS [2]]App] No 55% Netherlands 2,919,434 12/1959 Mes tre 340/174 [221 Filed Man24 1969 3,214,601 10/1965 Chr1stopherson 307/88 [45] Patented May 18,1971 Primary ExaminerStanley M. Urynowicz, Jr. [73] Assignee U.S.Philips Corporation Attorney-Frank R. Trifan' New York, N.Y. [32]Priority Apr. 10, 1968 [33] Netherlands i 6,805,155

ABSTRACT: in order to reduce stray of the output voltage in [54] Xreading information from a magnetic matrix store, the inforalms awmgmation is written as many times in the inverted state as in the [52] US.Cl 340/174 noninverted state, on average, so that the heat dissipationon [51] Int. Cl Gllc 7/04, an average is the same for all cores. Theinverted or nonin- Gl 1c 5/02, G1 10 1 1/06 verted state of the writteninformation is recorded by an aux- [50] Field of Search 340/174; iliarycore joined to each word, which core is read when the 307/88 informationof the word concerned is read.

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H K Zt: 4 2 21H 2 m Ii RA RA RA, A RA I. STORAGE DEVICE The inventionrelates to a matrix storage device comprising a plurality of cores ofmagnetic material having a rectangular hysteresis loop arrayed in rowsand columns of a matrix, the cores of the same row (word) being coupledwith the same word conductor and the cores of the same column beingcoupled with the same column conductor or information conductor.

In stores of this kind writing information in the cores of the same row(word) is performed by passing a current through the word conductorconcerned and a positive or a negative current in accordance with thedesired information through the various information conductors.

Reading information of a given word is performed by passing a currentopposite the first-mentioned current through the word conductorconcerned, a reaction pulse being induced in the information conductorwhich pulse is characteristic of the information of the read cores.

This involves the difficulty that the magnitude of the magnetic flux inthe cores and hence the magnitude of the reaction pulse in readingdepend comparatively intimately on the temperature of the cores.

It has been found that in general the temperature of the cores is notequal to the ambient temperature and that the temperature may be highlydifferent with different cores. This is due to the fact that at thechange of the magnetic state heat dissipation occurs in the cores sothat the temperature of the cores will be higher in accordance with morefrequent changes of state. In the cores of a store representing the mostsignificant bits will in general be written the digit 0, whereas thecores of the least significant bits will equally often be in the state Iand in the state 0.

this has a particularly disturbing effect in stores in which, in orderto attain a high working speed, the cores are operated only partially inthis case, magnetic flux variations are smaller than the differencebetween the two states of saturation so that a small variation of theflux, for example, due to change of temperature, will play acomparatively important part.

The invention mitigates these difficulties.

The invention is characterized in that the infonnation to be recorded isapplied to the various information conductors through gate circuitswhich transfer the information inverted or not inverted to theinformation conductors in dependence upon the state of a bistabletrigger which is on an average in time as many times in one state and inthe other state, this state being recorded in binary form in at leastone auxiliary core added to each word. In reading the information of agiven word, the information of the auxiliary core concerned constitutesthe indication of the inversion or noninversion of the recorded word.

The invention will be described more fully with reference to the drawingin which,

FIG. 1 shows schematically one embodiment of a binary storage deviceaccording to the invention and FIGS. 2, 3a, 3b and d illustratediagrams.

The store shown in FIG. l comprises a plurality of cores m" ilt im imK2141! 2101 arrayed in rows and columns of a matrix. The cores arejoined pairwise and each pair, for example, K and K,,,,, It, and K K andK corresponds to one bit or binary digit or in other words the store isof the type having two cores per bit.

The cores of the same column are coupled with the same informationconductor, for example, V,, V V etc. The cores of the same row arecoupled with the same horizontal conductor or word conductor l-ll,, Hetc. so that the cores of each pair are invariably coupled magneticallyin opposite senses with the word conductors as compared with thecoupling with the information conductors.

The cores coupled with the same word conductor correspond to the sameinformation word.

FIG. 2 shows an example of the hysteresis loop of the magnetic corematerial, in which on the axes BM and HM are plotted the magneticinductance (B) and the magnetic field (M) respectively. in the restposition, after information is read, the cores are in the state ofmagnetic remanence R.

When information has to be written in the cores of a given word, a writepulse (PH) from a word pulse generator WG,, WG WG, is applied to theword conductor concerned H',, H or H FIG. 2 shows furthermore a timeaxis r in vertical direction. The pulse concerned is illustrated in thediagram by the rectangle l, 2, 3, 4. Simultaneously information issupplied through the conductors A,, A etc. and the input gates B,, B 8,etc. so that in the magnetic conductors V,, V V etc. in accordance withthe desired information a positive current (-l-PV) or a negative current(-PV) is produced. Since, as stated above, the cores of each pair arecoupled in opposite senses with the vertical conductors, thelast-mentioned currents through the one core of each pair will amplifythe effect of the pulse on the word conductor I-ll so that a totaleffective pulse 11, 5, 6, 4 is obtained, whereas said current of theother core will counteract the effect, so that an effective pulse 1, 7,8, 4 is produced. The first'mentioned core will be driven into the statea during the pulses and at the termination of the pulses it will changeover to the state A, whereas in a similar manner the other core changesvia the state b to the state B. It

' depends upon the direction of the current through the bit conductorwhich of the two cores of each pair will get into the state A and whichwill pass to the state '8.

For reading information of a given word a pulse of a sense opposite thatof writing is applied through the word pulse generator WG,, WG etc. tothe associated word conductor so that all cores of the word return tothe remanence state R. The cores being in the state A then induce apulse PA (FIG. 3a) in the associated information conductor V,, V etc.,the magnitude of which pulse is proportional to the difference ofmagnetic flux between the points A and R (FIG. 2), whereas the coresbeing in the state B provide a pulse -PB, which is proportional to thedifference of the flux between the points B and R. Thus an effectiveoutput pulse is produced at the associated bit conductor which pulse PC(FIG. 3) is the difference between the pulses PA and PB and the polarityof which pulse depends upon which of the two cores was in the state Aand hence upon the information l or 0 written in the core pair. Theseoutput pulses are transferred through the read amplifiers RA,, RA- etc.and the output gates D,, D etc. to the output conductors E,, 5,, etc.

The store so far described is known.

In the diagram of FIG. 4 it is illustrated how the magnetic flux F inthe cores varies with the temperature T. The line Fa relates to cores inthe state A and the line Fb relates to cores in the state B. Thepositions of the points A and B in the diagram of FIG. 2 thus dependupon the temperature of the cores concerned.

When in a given pair of cores, for example, the pair K and K,,,,,corresponding to the most significant bits, the binary digit 0 iswritten and read for a long period, the flux in one core, for example, Kwill constantly vary between the points A and R of FIG. 2 and that ofthe other core between the points B and R. The flux variations in thecore K,,,, are therefore greater than in the core K so that thetemperature of the core K will be higher than that of the core K forexample, T and T, respectively, as is indicated in FIG. 4. The state ofthe core I(,,,, with written information will therefore correspond inFIG. 4 with point A, and that of the core K will correspond with pointB,. When reading information an output pulse V, will be produced, themagnitude of which is proportional to the difference in height betweenthe points A, and B,. When exceptionally the digit 1 is written in thecore pair, the core K,,,, with the temperature T, gate into the state B,which corresponds to the point B, of FIG. 4, whereas the core K willcorrespond to the point A, of FIG. 4. During reading an output pulse Vis produced, whose magnitude is considerably lower than V,. It has beenfound that under these conditions the pulse V may even be reduced tozero or it may even be of opposite polarity.

In order to avoid these difficulties, the following steps are taken inthe device shown in FIG. 1.

The input gates 8,, 3,, etc. are formed by changeover switchescontrolled by the bistable trigger FF,. The trigger FF,

is controlled in known manner by a noise generator RG so that on anaverage of time the trigger FF is asmany times in one state as in theother. The changeover switches 18,, 8,, etc. are controlled by thetrigger FF, so that, when the trigger is in one state, the informationof the conductors A A etc. is transferred, whereas, when the trigger isin the other state, this information is transferred in an invertedstate.

Since on an average of time the information is inverted as many times asit is not inverted during writing, the cores of each pair will,independent of the information, be on an average as many times in thestate A as in the state B. This means that the cores will assume themean temperature T (FIG. 4), which is approximately the same for thevarious cores.

In order to indicate whether during writing the information is invertedor not inverted, each word has joined to it a pair of auxiliary cores KK K which are controlled, when information is written in a given wordvia the conductor V,, by

the trigger FF 1 so that the core pair concerned is driven into a statewhich is characteristic of the instantaneous state of the trigger FFWhen information is read, these auxiliary cores are also read, so thatthrough the read amplifier RA, the trigger FF is driven into a givenstate which corresponds with the state of the trigger FF, when theinformation is written in the word concerned. The output gates D D etc.,like the gates 8,, B etc. are formed by changeover switches, which arecontrolled by the trigger FF so that the output pulses of the conductorsV,, V etc. are directly transmitted to the conductors E E etc. when theinfonnation is not inverted during writing, whereas the output pulsesare inverted in the gates D,, D etc., when during writing theinformation is inverted. Consequently, the information invariablyappears noninverted at the output conductors E E independently of thefact whether it is inverted or not inverted when written in the cores.

We claim:

l A matrix storage device for providing averaging of heat dissipationdue to switching in a core memory array compris ing a plurality of coresof magnetic material having a rectangular hysteresis loop and arrangedin rows and columns of a matrix, each of the cores of a row beingcoupled with a row conductor, each of the cores of a column beingcoupled with a column conductor, each of said row conductors includingat least one auxiliary core, means for applying writing signals, aplurality of gating means coupled between said means applying writingsignals and each of said columns, said gating means distributing saidwriting signals to said columns in an inverted or noninverted state inaccordance with either of two gating means conditions, control means forvarying said gating means between said conditions resulting in each ofsaid states, said control means varying said gating means over anaverage in time in both of said conditions, means coupling saidauxiliary core to said control means, said auxiliary core stateresponsive to said control means and indicative of said gating meanscondition, and reading means coupled to said auxiliary core forproviding an indication of the inverted or noninverted condition of saidwritten signals.

2. The combination of claim 1 wherein each of said row conductorsincludes two cores per column conductor arranged in row pairs, and anauxiliary core for each of said rows.

3. The combination of claim 1 wherein said control means includes agenerator coupled to a flip-flop, the output of said flip-flop beingcoupled to an input of each said gating means coupled to a column and tosaid auxiliary core.

4. The combination of claim 1 wherein said reading means includes aflip-flop coupled to said auxiliary core for assuming a state inaccordance with said auxiliary core state, a plurality of gates, eachassociated with a respective column and each responsive to the conditionof said flip-flop for providing an inverted or noninverted output readfrom said column in accordance with the signal written therein.

2. The combination of claim 1 wherein each of said row conductorsincludes two cores per column conductor arranged in row pairs, and anauxiliary core for each of said rows.
 3. The combination of claim 1wherein said control means includes a generator coupled to a flip-flop,the output of said flip-flop being coupled to an input of each saidgating means coupled to a column and to said auxiliary core.
 4. Thecombination of claim 1 wherein said reading means includes a flip-flopcoupled to said auxiliary core for assuming a state in accordance withsaid auxiliary core state, a plurality of gates, each associated with arespective column and each responsive to the condition of said flip-flopfor providing an inverted or noninverted output read from said column inaccordance with the signal written therein.